Uogolniona metoda syntezy licznikow o dowolnej strukturze

The main goal of the paper is to present a worked-out method of the counter synthesis, making it possible to design parallel, serial and serial-parallel structures constructed using synchronous flip-flops of arbitrary type and triggering mode. An effective method of the counter synthesis is proposed, it enables one to design in a uniform way counters of arbitrary structure realised using synchronous master-slave or edge-triggered flip-flops. In the paper the realizability conditions of N bit mod P counter having serial-parallel structure is given. This condition makes it possible to determine those counter stages that have to be constructed as parallel ones. A method of determining excitation functions for information and clock inputs of separate counter stages is presented. This method allows for determining in a single way, a structure sought and choosing an optimal one. The consideration presented is illustrated with examples.