Real-Time advanced speech enhancement using low-power, fixed-point hardware

Dariusz Bismor; Krzysztof Bartnicki

doi:10.1109/SPA.2016.7763588

Real-Time advanced speech enhancement using low-power, fixed-point hardware

Dariusz Bismor
, Krzysztof Bartnicki

Katedra Pomiarów i Systemów Sterowania (RAU/RAU2)

Oksydan Sp. z o.o.

Wyniki badań: Rozdział w książce/raport/materiał konferencyjny › Wkład w konferencję › recenzja

2 Cytowania z bazy Scopus

Abstrakt

This paper describes a project aiming at development of an embedded system speech enhancement solution. It was assumed that a low-cost, low-power, fixed-point processor will be used. It was also assumed that both the stationary and nonstationary noises should be removed. To meet the assumptions, the EZDSP5535 evaluation board, with the TMS320C5535 fixed-point digital signal processor, was selected as a hardware platform. Three speech enhancement algorithms were implemented: The FIR filtering, the adaptive line enhancement, and the spectral subtraction. The last algorithm, being a frequencydomain algorithm, utilizes the FFT co-processor available in the TMS320C5535 chip. All the algorithms can work simultaneously. Examples of good final performance are shown.

Język oryginału	angielski
Tytuł publikacji goszczącej	2016 Signal Processing
Podtytuł publikacji goszczącej	Algorithms, Architectures, Arrangements, and Applications, SPA 2016
Wydawca	IEEE Computer Society
Strony	62-67
Liczba stron	6
ISBN (elektroniczny)	9788362065271
Identyfikatory DOI	https://doi.org/10.1109/SPA.2016.7763588
Status publikacji	Opublikowano - 30 lis 2016
Wydarzenie	2016 Signal Processing: Algorithms, Architectures, Arrangements, and Applications, SPA 2016 - Poznan, Polska Czas trwania: 21 wrz 2016 → 23 wrz 2016

Seria publikacji

Nazwa	Signal Processing - Algorithms, Architectures, Arrangements, and Applications Conference Proceedings, SPA
ISSN (drukowany)	2326-0262
ISSN (elektroniczny)	2326-0319

Konferencja

Konferencja	2016 Signal Processing: Algorithms, Architectures, Arrangements, and Applications, SPA 2016
Kraj/Terytorium	Polska
Miejscowość	Poznan
Okres	21/09/16 → 23/09/16

Obszary tematyczne ASJC Scopus

Teoria i matematyka obliczeń
Zastosowania informatyki
Systemy informacyjne
Przetwarzanie sygnałów

Uzyskaj dostęp do dokumentu

10.1109/SPA.2016.7763588

Inne pliki i linki

Link do publikacji w Scopus

Cytowanie

Bismor, D., & Bartnicki, K. (2016). Real-Time advanced speech enhancement using low-power, fixed-point hardware. W 2016 Signal Processing: Algorithms, Architectures, Arrangements, and Applications, SPA 2016 (str. 62-67). Artykułu 7763588 (Signal Processing - Algorithms, Architectures, Arrangements, and Applications Conference Proceedings, SPA). IEEE Computer Society. https://doi.org/10.1109/SPA.2016.7763588

@inproceedings{4a6570e6e0964e959ca18cc02aa0c527,

title = "Real-Time advanced speech enhancement using low-power, fixed-point hardware",

abstract = "This paper describes a project aiming at development of an embedded system speech enhancement solution. It was assumed that a low-cost, low-power, fixed-point processor will be used. It was also assumed that both the stationary and nonstationary noises should be removed. To meet the assumptions, the EZDSP5535 evaluation board, with the TMS320C5535 fixed-point digital signal processor, was selected as a hardware platform. Three speech enhancement algorithms were implemented: The FIR filtering, the adaptive line enhancement, and the spectral subtraction. The last algorithm, being a frequencydomain algorithm, utilizes the FFT co-processor available in the TMS320C5535 chip. All the algorithms can work simultaneously. Examples of good final performance are shown.",

author = "Dariusz Bismor and Krzysztof Bartnicki",

year = "2016",

month = nov,

day = "30",

doi = "10.1109/SPA.2016.7763588",

language = "English",

series = "Signal Processing - Algorithms, Architectures, Arrangements, and Applications Conference Proceedings, SPA",

publisher = "IEEE Computer Society",

pages = "62--67",

booktitle = "2016 Signal Processing",

address = "United States",

note = "2016 Signal Processing: Algorithms, Architectures, Arrangements, and Applications, SPA 2016 ; Conference date: 21-09-2016 Through 23-09-2016",

}

Bismor, D & Bartnicki, K 2016, Real-Time advanced speech enhancement using low-power, fixed-point hardware. w 2016 Signal Processing: Algorithms, Architectures, Arrangements, and Applications, SPA 2016., 7763588, Signal Processing - Algorithms, Architectures, Arrangements, and Applications Conference Proceedings, SPA, IEEE Computer Society, str. 62-67, 2016 Signal Processing: Algorithms, Architectures, Arrangements, and Applications, SPA 2016, Poznan, Polska, 21/09/16. https://doi.org/10.1109/SPA.2016.7763588

Real-Time advanced speech enhancement using low-power, fixed-point hardware. / Bismor, Dariusz; Bartnicki, Krzysztof.
2016 Signal Processing: Algorithms, Architectures, Arrangements, and Applications, SPA 2016. IEEE Computer Society, 2016. str. 62-67 7763588 (Signal Processing - Algorithms, Architectures, Arrangements, and Applications Conference Proceedings, SPA).

Wyniki badań: Rozdział w książce/raport/materiał konferencyjny › Wkład w konferencję › recenzja

TY - GEN

T1 - Real-Time advanced speech enhancement using low-power, fixed-point hardware

AU - Bismor, Dariusz

AU - Bartnicki, Krzysztof

PY - 2016/11/30

Y1 - 2016/11/30

N2 - This paper describes a project aiming at development of an embedded system speech enhancement solution. It was assumed that a low-cost, low-power, fixed-point processor will be used. It was also assumed that both the stationary and nonstationary noises should be removed. To meet the assumptions, the EZDSP5535 evaluation board, with the TMS320C5535 fixed-point digital signal processor, was selected as a hardware platform. Three speech enhancement algorithms were implemented: The FIR filtering, the adaptive line enhancement, and the spectral subtraction. The last algorithm, being a frequencydomain algorithm, utilizes the FFT co-processor available in the TMS320C5535 chip. All the algorithms can work simultaneously. Examples of good final performance are shown.

AB - This paper describes a project aiming at development of an embedded system speech enhancement solution. It was assumed that a low-cost, low-power, fixed-point processor will be used. It was also assumed that both the stationary and nonstationary noises should be removed. To meet the assumptions, the EZDSP5535 evaluation board, with the TMS320C5535 fixed-point digital signal processor, was selected as a hardware platform. Three speech enhancement algorithms were implemented: The FIR filtering, the adaptive line enhancement, and the spectral subtraction. The last algorithm, being a frequencydomain algorithm, utilizes the FFT co-processor available in the TMS320C5535 chip. All the algorithms can work simultaneously. Examples of good final performance are shown.

UR - https://www.scopus.com/pages/publications/85014154877

U2 - 10.1109/SPA.2016.7763588

DO - 10.1109/SPA.2016.7763588

M3 - Conference contribution

AN - SCOPUS:85014154877

T3 - Signal Processing - Algorithms, Architectures, Arrangements, and Applications Conference Proceedings, SPA

SP - 62

EP - 67

BT - 2016 Signal Processing

PB - IEEE Computer Society

T2 - 2016 Signal Processing: Algorithms, Architectures, Arrangements, and Applications, SPA 2016

Y2 - 21 September 2016 through 23 September 2016

ER -

Bismor D, Bartnicki K. Real-Time advanced speech enhancement using low-power, fixed-point hardware. W 2016 Signal Processing: Algorithms, Architectures, Arrangements, and Applications, SPA 2016. IEEE Computer Society. 2016. str. 62-67. 7763588. (Signal Processing - Algorithms, Architectures, Arrangements, and Applications Conference Proceedings, SPA). doi: 10.1109/SPA.2016.7763588

Real-Time advanced speech enhancement using low-power, fixed-point hardware

Abstrakt

Seria publikacji

Konferencja

Obszary tematyczne ASJC Scopus

Uzyskaj dostęp do dokumentu

Inne pliki i linki

Fingerprint

Cytowanie