TY - GEN
T1 - Non-disjoint decomposition of logic functions in Reed-Muller spectral domain
AU - Hrynkiewicz, Edward
AU - Kołodziński, Stefan
PY - 2010
Y1 - 2010
N2 - The paper deals with the problems of input variables assigning to the free set bounded set and common set during logic function non-disjoint decomposition. The Ashenhurst and Curtis decompositions are considered with respect to implementation of logic functions in LUT based FPGA. The method of finding profitable common variables set (from the point of view of non-disjoint decomposition) is based on utilization of Logic Differential Calculus and authors experiences. The decomposition is carried out in Reed-Muller spectral domain because the Boolean differentials are easy calculated from Reed-Muller form of logic function which is obtained as reverse Reed-Muller transform. The results of decomposition are very promising.
AB - The paper deals with the problems of input variables assigning to the free set bounded set and common set during logic function non-disjoint decomposition. The Ashenhurst and Curtis decompositions are considered with respect to implementation of logic functions in LUT based FPGA. The method of finding profitable common variables set (from the point of view of non-disjoint decomposition) is based on utilization of Logic Differential Calculus and authors experiences. The decomposition is carried out in Reed-Muller spectral domain because the Boolean differentials are easy calculated from Reed-Muller form of logic function which is obtained as reverse Reed-Muller transform. The results of decomposition are very promising.
KW - Boolean Differential Calculus
KW - FPGA
KW - Non-disjoint decomposition
KW - Reed-Muller spectrum
UR - https://www.scopus.com/pages/publications/77954912798
U2 - 10.1109/DDECS.2010.5491764
DO - 10.1109/DDECS.2010.5491764
M3 - Conference contribution
AN - SCOPUS:77954912798
SN - 9781424466139
T3 - Proceedings of the 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2010
SP - 293
EP - 296
BT - Proceedings of the 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2010
T2 - 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2010
Y2 - 14 April 2010 through 16 April 2010
ER -