Detection, localisation and identification of interconnection faults using MISR compactor

T. Garbolino; M. Kopec; K. Gucwa; A. Hlawiczka

doi:10.1109/DDECS.2006.1649621

Detection, localisation and identification of interconnection faults using MISR compactor

T. Garbolino
, M. Kopec
, K. Gucwa
, A. Hlawiczka

Katedra Systemów Cyfrowych (RAU/RAU12)

Silesian University of Technology

Wyniki badań: Rozdział w książce/raport/materiał konferencyjny › Wkład w konferencję › recenzja

2 Cytowania z bazy Scopus

Abstrakt

The paper introduces a novel idea of interconnect fault detection, localization and identification based on test response compaction using a MISR The above-mentioned operations are made at-speed. The localization is done by means of three long, full diagnostic resolution sequences: Walking 1 (W1), Walking 0 (WO) and a part of Johnson sequence (J). The final fault identification phase exploits information stored in two or three signatures

Język oryginału	angielski
Tytuł publikacji goszczącej	2006 IEEE Design and Diagnostics of Electronic Circuits and systems
Strony	228-229
Liczba stron	2
Identyfikatory DOI	https://doi.org/10.1109/DDECS.2006.1649621
Status publikacji	Opublikowano - 2006
Wydarzenie	2006 IEEE Design and Diagnostics of Electronic Circuits and systems - Praque, Republika Czeska Czas trwania: 18 kwi 2006 → 21 kwi 2006

Seria publikacji

Nazwa	2006 IEEE Design and Diagnostics of Electronic Circuits and systems
Tom	2006

Konferencja

Konferencja	2006 IEEE Design and Diagnostics of Electronic Circuits and systems
Kraj/Terytorium	Republika Czeska
Miejscowość	Praque
Okres	18/04/06 → 21/04/06

Obszary tematyczne ASJC Scopus

Inżynieria ogólna

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10.1109/DDECS.2006.1649621

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Cytowanie

Garbolino, T., Kopec, M., Gucwa, K., & Hlawiczka, A. (2006). Detection, localisation and identification of interconnection faults using MISR compactor. W 2006 IEEE Design and Diagnostics of Electronic Circuits and systems (str. 228-229). Artykułu 1649621 (2006 IEEE Design and Diagnostics of Electronic Circuits and systems; Tom 2006). https://doi.org/10.1109/DDECS.2006.1649621

@inproceedings{87998b348dda4ba3ba51f0e608023fcf,

title = "Detection, localisation and identification of interconnection faults using MISR compactor",

abstract = "The paper introduces a novel idea of interconnect fault detection, localization and identification based on test response compaction using a MISR The above-mentioned operations are made at-speed. The localization is done by means of three long, full diagnostic resolution sequences: Walking 1 (W1), Walking 0 (WO) and a part of Johnson sequence (J). The final fault identification phase exploits information stored in two or three signatures",

author = "T. Garbolino and M. Kopec and K. Gucwa and A. Hlawiczka",

year = "2006",

doi = "10.1109/DDECS.2006.1649621",

language = "English",

isbn = "1424401852",

series = "2006 IEEE Design and Diagnostics of Electronic Circuits and systems",

pages = "228--229",

booktitle = "2006 IEEE Design and Diagnostics of Electronic Circuits and systems",

note = "2006 IEEE Design and Diagnostics of Electronic Circuits and systems ; Conference date: 18-04-2006 Through 21-04-2006",

}

Garbolino, T, Kopec, M, Gucwa, K & Hlawiczka, A 2006, Detection, localisation and identification of interconnection faults using MISR compactor. w 2006 IEEE Design and Diagnostics of Electronic Circuits and systems., 1649621, 2006 IEEE Design and Diagnostics of Electronic Circuits and systems, tom 2006, str. 228-229, 2006 IEEE Design and Diagnostics of Electronic Circuits and systems, Praque, Republika Czeska, 18/04/06. https://doi.org/10.1109/DDECS.2006.1649621

Detection, localisation and identification of interconnection faults using MISR compactor. / Garbolino, T.; Kopec, M.; Gucwa, K. i in.
2006 IEEE Design and Diagnostics of Electronic Circuits and systems. 2006. str. 228-229 1649621 (2006 IEEE Design and Diagnostics of Electronic Circuits and systems; Tom 2006).

Wyniki badań: Rozdział w książce/raport/materiał konferencyjny › Wkład w konferencję › recenzja

TY - GEN

T1 - Detection, localisation and identification of interconnection faults using MISR compactor

AU - Garbolino, T.

AU - Kopec, M.

AU - Gucwa, K.

AU - Hlawiczka, A.

PY - 2006

Y1 - 2006

N2 - The paper introduces a novel idea of interconnect fault detection, localization and identification based on test response compaction using a MISR The above-mentioned operations are made at-speed. The localization is done by means of three long, full diagnostic resolution sequences: Walking 1 (W1), Walking 0 (WO) and a part of Johnson sequence (J). The final fault identification phase exploits information stored in two or three signatures

AB - The paper introduces a novel idea of interconnect fault detection, localization and identification based on test response compaction using a MISR The above-mentioned operations are made at-speed. The localization is done by means of three long, full diagnostic resolution sequences: Walking 1 (W1), Walking 0 (WO) and a part of Johnson sequence (J). The final fault identification phase exploits information stored in two or three signatures

UR - https://www.scopus.com/pages/publications/33847242296

U2 - 10.1109/DDECS.2006.1649621

DO - 10.1109/DDECS.2006.1649621

M3 - Conference contribution

AN - SCOPUS:33847242296

SN - 1424401852

SN - 9781424401857

T3 - 2006 IEEE Design and Diagnostics of Electronic Circuits and systems

SP - 228

EP - 229

BT - 2006 IEEE Design and Diagnostics of Electronic Circuits and systems

T2 - 2006 IEEE Design and Diagnostics of Electronic Circuits and systems

Y2 - 18 April 2006 through 21 April 2006

ER -

Detection, localisation and identification of interconnection faults using MISR compactor

Abstrakt

Seria publikacji

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Obszary tematyczne ASJC Scopus

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