Abstrakt
The article discusses the design process of the central processing unit (CPU) for programmable logic controllers. On the one hand the designed CPU is compatible with IEC 61131-3 standard. On the other hand, the authors attempt to reflect on the possible implementations of the unit by means of FPGA. The machine instructions of the unit are tailored to be similar to instruction list (IL) introduced in the IEC 61131-3 standard. However, the unit is programmed by means of the standard IL. Remarks about the IEC standard and the specific features of the FPGA technology are presented.
| Język oryginału | angielski |
|---|---|
| Strony (od–do) | 454-459 |
| Liczba stron | 6 |
| Czasopismo | IFAC-PapersOnLine |
| Tom | 49 |
| Numer wydania | 25 |
| Identyfikatory DOI | |
| Status publikacji | Opublikowano - 2016 |
Obszary tematyczne ASJC Scopus
- Inżynieria sterowania i systemów
Fingerprint
Zanurz się w tematy badawcze publikacji „Central processing unit of IEC 61131-3-based PLC”. Razem tworzą niepowtarzalny odcisk palca.Cytowanie
- APA
- Author
- BIBTEX
- Harvard
- Standard
- RIS
- Vancouver