An utilisation of boolean differential calculus in variables partition calculation for decomposition of logic functions

Stefan Kolłodziński; Edward Hrynkiewicz

doi:10.1109/DDECS.2009.5012095

An utilisation of boolean differential calculus in variables partition calculation for decomposition of logic functions

Stefan Kolłodziński
, Edward Hrynkiewicz

Katedra Systemów Cyfrowych (RAU/RAU12)

United Technologies Corporation

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7 Cytowania z bazy Scopus

Abstrakt

The paper deals with the problems of input variables assigning to the free and bounded sets during logic function decomposition. The Ashenhurst decomposition is considered with respect to implementation of logic functions in LUT based FPGA. The method of finding profitable input variables partitioning is based on utilisation of Logic Differential Calculus. The elaborated method is very convenient especially if decomposition is carried out in Reed- Muller spectral domain because the Boolean differentials are easy calculated from Reed-Muller form of logic function which is simply calculated as reverse Reed-Muller transform. The obtained results are very promising.

Język oryginału	angielski
Tytuł publikacji goszczącej	Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009
Strony	34-37
Liczba stron	4
Identyfikatory DOI	https://doi.org/10.1109/DDECS.2009.5012095
Status publikacji	Opublikowano - 2009
Wydarzenie	2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009 - Liberec, Republika Czeska Czas trwania: 15 kwi 2009 → 17 kwi 2009

Seria publikacji

Nazwa	Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009

Konferencja

Konferencja	2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009
Kraj/Terytorium	Republika Czeska
Miejscowość	Liberec
Okres	15/04/09 → 17/04/09

Obszary tematyczne ASJC Scopus

Sprzęt i architektura
Inżynieria sterowania i systemów
Inżynieria elektryczna i elektroniczna

Uzyskaj dostęp do dokumentu

10.1109/DDECS.2009.5012095

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Link do publikacji w Scopus

Cytowanie

Kolłodziński, S., & Hrynkiewicz, E. (2009). An utilisation of boolean differential calculus in variables partition calculation for decomposition of logic functions. W Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009 (str. 34-37). Artykułu 5012095 (Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009). https://doi.org/10.1109/DDECS.2009.5012095

Kolłodziński, Stefan ; Hrynkiewicz, Edward. / An utilisation of boolean differential calculus in variables partition calculation for decomposition of logic functions. Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009. 2009. str. 34-37 (Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009).

@inproceedings{bba307489e654779ac3332ee6460c995,

title = "An utilisation of boolean differential calculus in variables partition calculation for decomposition of logic functions",

abstract = "The paper deals with the problems of input variables assigning to the free and bounded sets during logic function decomposition. The Ashenhurst decomposition is considered with respect to implementation of logic functions in LUT based FPGA. The method of finding profitable input variables partitioning is based on utilisation of Logic Differential Calculus. The elaborated method is very convenient especially if decomposition is carried out in Reed- Muller spectral domain because the Boolean differentials are easy calculated from Reed-Muller form of logic function which is simply calculated as reverse Reed-Muller transform. The obtained results are very promising.",

author = "Stefan Kol{\l}odzi{\'n}ski and Edward Hrynkiewicz",

year = "2009",

doi = "10.1109/DDECS.2009.5012095",

language = "English",

isbn = "9781424433391",

series = "Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009",

pages = "34--37",

booktitle = "Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009",

note = "2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009 ; Conference date: 15-04-2009 Through 17-04-2009",

}

Kolłodziński, S & Hrynkiewicz, E 2009, An utilisation of boolean differential calculus in variables partition calculation for decomposition of logic functions. w Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009., 5012095, Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009, str. 34-37, 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009, Liberec, Republika Czeska, 15/04/09. https://doi.org/10.1109/DDECS.2009.5012095

An utilisation of boolean differential calculus in variables partition calculation for decomposition of logic functions. / Kolłodziński, Stefan; Hrynkiewicz, Edward.
Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009. 2009. str. 34-37 5012095 (Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009).

Wyniki badań: Rozdział w książce/raport/materiał konferencyjny › Wkład w konferencję › recenzja

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N2 - The paper deals with the problems of input variables assigning to the free and bounded sets during logic function decomposition. The Ashenhurst decomposition is considered with respect to implementation of logic functions in LUT based FPGA. The method of finding profitable input variables partitioning is based on utilisation of Logic Differential Calculus. The elaborated method is very convenient especially if decomposition is carried out in Reed- Muller spectral domain because the Boolean differentials are easy calculated from Reed-Muller form of logic function which is simply calculated as reverse Reed-Muller transform. The obtained results are very promising.

AB - The paper deals with the problems of input variables assigning to the free and bounded sets during logic function decomposition. The Ashenhurst decomposition is considered with respect to implementation of logic functions in LUT based FPGA. The method of finding profitable input variables partitioning is based on utilisation of Logic Differential Calculus. The elaborated method is very convenient especially if decomposition is carried out in Reed- Muller spectral domain because the Boolean differentials are easy calculated from Reed-Muller form of logic function which is simply calculated as reverse Reed-Muller transform. The obtained results are very promising.

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BT - Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009

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Kolłodziński S, Hrynkiewicz E. An utilisation of boolean differential calculus in variables partition calculation for decomposition of logic functions. W Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009. 2009. str. 34-37. 5012095. (Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009). doi: 10.1109/DDECS.2009.5012095

An utilisation of boolean differential calculus in variables partition calculation for decomposition of logic functions

Abstrakt

Seria publikacji

Konferencja

Obszary tematyczne ASJC Scopus

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Inne pliki i linki

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