An analogue integrated circuits yield optimisation with the use of genetic algorithm

Piotr Jantos; Damian Grzechca; Jerzy Rutkowski

An analogue integrated circuits yield optimisation with the use of genetic algorithm

Piotr Jantos
, Damian Grzechca
, Jerzy Rutkowski

Katedra Elektroniki, Elektrotechniki i Mikroelektroniki (RAU/RAU11)

Silesian University of Technology

Wyniki badań: Rozdział w książce/raport/materiał konferencyjny › Wkład w konferencję › recenzja

1 Cytowanie z bazy Scopus

Abstrakt

Design for Manufacturability and Yield is one of the most important concepts in analogue integrated circuits manufacturing. The process of adjusting the nominal values of circuit parameters allows for partial immunisation of its performance against deviations in value of the circuit's parameters. This paper proposes the use of an evolutionary tool, the genetic algorithm, for design centring. The process is based on encompassing an assumed integrated model and Monte Carlo analysis. The presented design centring method has been verified with the use of an example circuit, i.e. a CMOS operational amplifier.

Język oryginału	angielski
Tytuł publikacji goszczącej	International Conference on Signals and Electronic Systems, ICSES'10 - Conference Proceedings
Strony	293-296
Liczba stron	4
Status publikacji	Opublikowano - 2010
Wydarzenie	International Conference on Signals and Electronic Systems, ICSES'10 - Gliwice, Polska Czas trwania: 7 wrz 2010 → 10 wrz 2010

Seria publikacji

Nazwa	International Conference on Signals and Electronic Systems, ICSES'10 - Conference Proceeding

Konferencja

Konferencja	International Conference on Signals and Electronic Systems, ICSES'10
Kraj/Terytorium	Polska
Miejscowość	Gliwice
Okres	7/09/10 → 10/09/10

Cele SDG ONZ

Ten wynik przyczynia się do realizacji następujących celów zrównoważonego rozwoju

Cel 9 Przemysł, innowacje i infrastruktura

Obszary tematyczne ASJC Scopus

Przetwarzanie sygnałów
Inżynieria elektryczna i elektroniczna

Inne pliki i linki

Link do publikacji w Scopus

Cytowanie

@inproceedings{a4508dbee46c4c9b8e137e8c2320e4a8,

title = "An analogue integrated circuits yield optimisation with the use of genetic algorithm",

abstract = "Design for Manufacturability and Yield is one of the most important concepts in analogue integrated circuits manufacturing. The process of adjusting the nominal values of circuit parameters allows for partial immunisation of its performance against deviations in value of the circuit's parameters. This paper proposes the use of an evolutionary tool, the genetic algorithm, for design centring. The process is based on encompassing an assumed integrated model and Monte Carlo analysis. The presented design centring method has been verified with the use of an example circuit, i.e. a CMOS operational amplifier.",

author = "Piotr Jantos and Damian Grzechca and Jerzy Rutkowski",

year = "2010",

language = "English",

isbn = "9788390474342",

series = "International Conference on Signals and Electronic Systems, ICSES'10 - Conference Proceeding",

pages = "293--296",

booktitle = "International Conference on Signals and Electronic Systems, ICSES'10 - Conference Proceedings",

note = "International Conference on Signals and Electronic Systems, ICSES'10 ; Conference date: 07-09-2010 Through 10-09-2010",

}

Jantos, P, Grzechca, D & Rutkowski, J 2010, An analogue integrated circuits yield optimisation with the use of genetic algorithm. w International Conference on Signals and Electronic Systems, ICSES'10 - Conference Proceedings., 5595190, International Conference on Signals and Electronic Systems, ICSES'10 - Conference Proceeding, str. 293-296, International Conference on Signals and Electronic Systems, ICSES'10, Gliwice, Polska, 7/09/10.

An analogue integrated circuits yield optimisation with the use of genetic algorithm. / Jantos, Piotr; Grzechca, Damian; Rutkowski, Jerzy.
International Conference on Signals and Electronic Systems, ICSES'10 - Conference Proceedings. 2010. str. 293-296 5595190 (International Conference on Signals and Electronic Systems, ICSES'10 - Conference Proceeding).

Wyniki badań: Rozdział w książce/raport/materiał konferencyjny › Wkład w konferencję › recenzja

TY - GEN

T1 - An analogue integrated circuits yield optimisation with the use of genetic algorithm

AU - Jantos, Piotr

AU - Grzechca, Damian

AU - Rutkowski, Jerzy

PY - 2010

Y1 - 2010

N2 - Design for Manufacturability and Yield is one of the most important concepts in analogue integrated circuits manufacturing. The process of adjusting the nominal values of circuit parameters allows for partial immunisation of its performance against deviations in value of the circuit's parameters. This paper proposes the use of an evolutionary tool, the genetic algorithm, for design centring. The process is based on encompassing an assumed integrated model and Monte Carlo analysis. The presented design centring method has been verified with the use of an example circuit, i.e. a CMOS operational amplifier.

AB - Design for Manufacturability and Yield is one of the most important concepts in analogue integrated circuits manufacturing. The process of adjusting the nominal values of circuit parameters allows for partial immunisation of its performance against deviations in value of the circuit's parameters. This paper proposes the use of an evolutionary tool, the genetic algorithm, for design centring. The process is based on encompassing an assumed integrated model and Monte Carlo analysis. The presented design centring method has been verified with the use of an example circuit, i.e. a CMOS operational amplifier.

UR - https://www.scopus.com/pages/publications/78649251026

M3 - Conference contribution

AN - SCOPUS:78649251026

SN - 9788390474342

T3 - International Conference on Signals and Electronic Systems, ICSES'10 - Conference Proceeding

SP - 293

EP - 296

BT - International Conference on Signals and Electronic Systems, ICSES'10 - Conference Proceedings

T2 - International Conference on Signals and Electronic Systems, ICSES'10

Y2 - 7 September 2010 through 10 September 2010

ER -

An analogue integrated circuits yield optimisation with the use of genetic algorithm

Abstrakt

Seria publikacji

Konferencja

Cele SDG ONZ

Obszary tematyczne ASJC Scopus

Inne pliki i linki

Fingerprint

Cytowanie