Abstract
Paper deals with a new design methodology in the domain of Systems on Chip (SoC) based on systems modeling in SystemC. Transaction Level Models (TLMs) have been introduced in the system-level design tools recently. In this contribution the author presents an approach to the problem of concurrent (hardware-software) electronics embedded systems design. A system partitioning based on the Transaction Level Models analysis implemented in PROLOG is presented. Some issues concerning system partitioning into software and hardware components are outlined. Conclusions and obtained results are discussed.
| Original language | English |
|---|---|
| Pages (from-to) | 278-283 |
| Number of pages | 6 |
| Journal | IFAC-PapersOnLine |
| Volume | 37 |
| Issue number | 20 |
| DOIs | |
| Publication status | Published - 2004 |
| Event | 2004 IFAC Workshop on Programmable Devices and Systems, PDS 2004 - Cracow, Poland Duration: 18 Nov 2004 → 19 Nov 2004 |
Keywords
- Architectures
- Components
- Decomposition
- Design VLSI
- Embedded systems
- Hardware
- Models
- Optimization
- Systems design
ASJC Scopus subject areas
- Control and Systems Engineering
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