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State Machine description oriented towards effective usage of vendor-independent synthesis tools

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

2 Citations (Scopus)

Abstract

The paper concerns the problem of Finite State Machine (FSM) description in Hardware Description Languages (HDL), and effective usage of vendor-independent synthesis tools, including academic software, in synthesis dedicated for Complex Programmable Logic Devices (CPLD-s). The authors propose an alternative method of porting a design from a vendor-independent synthesis tool to a vendor system, for completing the implementation stage. The method utilises a special style of VHDL modelling, so the description is universal and comprehendible to a human. Efficiency of the method was verified by experiments carried out using academic software, and leading commercial tools.

Original languageEnglish
Title of host publication9th IFAC Workshop on Programmable Devices and Embedded Systems, PDES 2009 - Proceedings
PublisherIFAC Secretariat
Pages27-32
Number of pages6
EditionPART 1
ISBN (Print)9783902661418
DOIs
Publication statusPublished - 2009

Publication series

NameIFAC Proceedings Volumes (IFAC-PapersOnline)
NumberPART 1
Volume9
ISSN (Print)1474-6670

Keywords

  • Complex Programmable Logic Devices
  • Computer-aided circuit design
  • Digital circuits
  • Finite State Machines
  • Hardware Description Languages
  • Logic arrays
  • Programmable Logic Devices
  • State assignment
  • VLSI design

ASJC Scopus subject areas

  • Control and Systems Engineering

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