Abstract
The non-binary (NB) Irregular Repeat Accumulate (IRA) codes, as a subclass of NB LDPC codes, potentially have an excellent error-correcting performance. They are also known to provide linear complexity of encoding, but the basic encoding method with the serial rate-1 accumulator significantly limits the encoder throughput. Then the objective of the research presented in this paper is to develop an encoding method providing significantly increased throughput of an NB-IRA encoder altogether with a flexible code construction methods for the structured (S-NB-IRA) codes eligible for the proposed encoding method. For this purpose, we reformulate the classic encoding algorithm to fit into the partial parallel encoder architecture. We propose the S-NB-IRA encoder block diagram and show that its estimated throughput is proportional to the submatrix size of the parity check matrix, which guarantees a wide complexity-throughput tradeoff. Then, in order to facilitate the S-NB-IRA coding systems design, we present a computer search algorithm for the construction of good S-NB-IRA codes. The algorithm aims at optimizing the code graph topology along with selecting an appropriate non-binary elements in the parity check matrix. Numerical results show that the constructed S-NB-IRA codes significantly outperform the binary IRA and S-IRA codes, while their performance is similar to the best unstructured NB-LDPC codes.
| Original language | English |
|---|---|
| Article number | 7563713 |
| Pages (from-to) | 103-116 |
| Number of pages | 14 |
| Journal | China Communications |
| Volume | 13 |
| Issue number | 8 |
| DOIs | |
| Publication status | Published - Aug 2016 |
Keywords
- IRA codes
- LDPC codes
- LDPC encoder design
- LDPC encoding
- channel coding
- non-binary LDPC
ASJC Scopus subject areas
- Computer Networks and Communications
- Electrical and Electronic Engineering
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