Improved digital I/O ports enhance testability of interconnections

Adam Kristof

Improved digital I/O ports enhance testability of interconnections

Adam Kristof

Department of Automatic Control and Robotics (RAU/RAU3)

Research output: Contribution to journal › Conference article › peer-review

1 Citation (Scopus)

Abstract

In this paper improved I/O ports for digital integrated circuits are presented. These new I/O ports have controllable electrical properties and built-in overload detectors. The first feature ensures a desirable interconnection fault model during testing. The built-in overload detectors enable short circuits and overloads to be detected on-line. An example design, cost estimation and experimental results are described.

Original language	English
Pages (from-to)	763-772
Number of pages	10
Journal	IEEE International Test Conference (TC)
Publication status	Published - 2002
Event	Proceedings International Test Conference - Baltimore, MD, United States Duration: 7 Oct 2002 → 10 Oct 2002

ASJC Scopus subject areas

Electrical and Electronic Engineering
Applied Mathematics

Cite this

@article{5f536e3ecf7c4e548b35d036efccde4f,

title = "Improved digital I/O ports enhance testability of interconnections",

abstract = "In this paper improved I/O ports for digital integrated circuits are presented. These new I/O ports have controllable electrical properties and built-in overload detectors. The first feature ensures a desirable interconnection fault model during testing. The built-in overload detectors enable short circuits and overloads to be detected on-line. An example design, cost estimation and experimental results are described.",

author = "Adam Kristof",

year = "2002",

language = "English",

pages = "763--772",

journal = "IEEE International Test Conference (TC)",

issn = "1089-3539",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "Proceedings International Test Conference ; Conference date: 07-10-2002 Through 10-10-2002",

}

TY - JOUR

T1 - Improved digital I/O ports enhance testability of interconnections

AU - Kristof, Adam

PY - 2002

Y1 - 2002

N2 - In this paper improved I/O ports for digital integrated circuits are presented. These new I/O ports have controllable electrical properties and built-in overload detectors. The first feature ensures a desirable interconnection fault model during testing. The built-in overload detectors enable short circuits and overloads to be detected on-line. An example design, cost estimation and experimental results are described.

AB - In this paper improved I/O ports for digital integrated circuits are presented. These new I/O ports have controllable electrical properties and built-in overload detectors. The first feature ensures a desirable interconnection fault model during testing. The built-in overload detectors enable short circuits and overloads to be detected on-line. An example design, cost estimation and experimental results are described.

UR - https://www.scopus.com/pages/publications/0036446826

M3 - Conference article

AN - SCOPUS:0036446826

SN - 1089-3539

SP - 763

EP - 772

JO - IEEE International Test Conference (TC)

JF - IEEE International Test Conference (TC)

T2 - Proceedings International Test Conference

Y2 - 7 October 2002 through 10 October 2002

ER -

Improved digital I/O ports enhance testability of interconnections

Abstract

ASJC Scopus subject areas

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