Feature extraction using reconfigurable hardware

Wiesław Pamula

doi:10.1007/978-3-642-15907-7_20

Feature extraction using reconfigurable hardware

Wiesław Pamula

Department of Transport Systems, Traffic Engineering and Logistics (RT/RT4)

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

3 Citations (Scopus)

Abstract

Feature extraction is an important stage in image processing for object classification, tracking or identification. Real time processing adds stringent constraints on the efficiency of this task. The paper presents a discussion of a reconfigurable hardware processing architecture, based on components, for performing feature calculations using convolutions, morphology operators and local statistics. Special attention is directed to pipelining calculations, fast determination of minimum, median and maximum of values. The architecture is optimised for video streams, which provide the image contents using horizontal scanning. An implementation using a low cost FPGA is presented proving the feasibility of this approach.

Original language	English
Title of host publication	Computer Vision and Graphics - International Conference, ICCVG 2010, Proceedings
Pages	158-165
Number of pages	8
Edition	PART 2
DOIs	https://doi.org/10.1007/978-3-642-15907-7_20
Publication status	Published - 2010
Event	International Conference on Computer Vision and Graphics, ICCVG 2010 - Warsaw, Poland Duration: 20 Sept 2010 → 22 Sept 2010

Publication series

Name	Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Number	PART 2
Volume	6375 LNCS
ISSN (Print)	0302-9743
ISSN (Electronic)	1611-3349

Conference

Conference	International Conference on Computer Vision and Graphics, ICCVG 2010
Country/Territory	Poland
City	Warsaw
Period	20/09/10 → 22/09/10

ASJC Scopus subject areas

Theoretical Computer Science
General Computer Science

Access to Document

10.1007/978-3-642-15907-7_20

Cite this

Pamula, W. (2010). Feature extraction using reconfigurable hardware. In Computer Vision and Graphics - International Conference, ICCVG 2010, Proceedings (PART 2 ed., pp. 158-165). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 6375 LNCS, No. PART 2). https://doi.org/10.1007/978-3-642-15907-7_20

@inproceedings{2fe82de7fc9949609f9de7b0ab1a643c,

title = "Feature extraction using reconfigurable hardware",

abstract = "Feature extraction is an important stage in image processing for object classification, tracking or identification. Real time processing adds stringent constraints on the efficiency of this task. The paper presents a discussion of a reconfigurable hardware processing architecture, based on components, for performing feature calculations using convolutions, morphology operators and local statistics. Special attention is directed to pipelining calculations, fast determination of minimum, median and maximum of values. The architecture is optimised for video streams, which provide the image contents using horizontal scanning. An implementation using a low cost FPGA is presented proving the feasibility of this approach.",

author = "Wies{\l}aw Pamula",

year = "2010",

doi = "10.1007/978-3-642-15907-7\_20",

language = "English",

isbn = "3642159060",

series = "Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)",

number = "PART 2",

pages = "158--165",

booktitle = "Computer Vision and Graphics - International Conference, ICCVG 2010, Proceedings",

edition = "PART 2",

note = "International Conference on Computer Vision and Graphics, ICCVG 2010 ; Conference date: 20-09-2010 Through 22-09-2010",

}

Pamula, W 2010, Feature extraction using reconfigurable hardware. in Computer Vision and Graphics - International Conference, ICCVG 2010, Proceedings. PART 2 edn, Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), no. PART 2, vol. 6375 LNCS, pp. 158-165, International Conference on Computer Vision and Graphics, ICCVG 2010, Warsaw, Poland, 20/09/10. https://doi.org/10.1007/978-3-642-15907-7_20

Feature extraction using reconfigurable hardware. / Pamula, Wiesław.
Computer Vision and Graphics - International Conference, ICCVG 2010, Proceedings. PART 2. ed. 2010. p. 158-165 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 6375 LNCS, No. PART 2).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

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PY - 2010

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N2 - Feature extraction is an important stage in image processing for object classification, tracking or identification. Real time processing adds stringent constraints on the efficiency of this task. The paper presents a discussion of a reconfigurable hardware processing architecture, based on components, for performing feature calculations using convolutions, morphology operators and local statistics. Special attention is directed to pipelining calculations, fast determination of minimum, median and maximum of values. The architecture is optimised for video streams, which provide the image contents using horizontal scanning. An implementation using a low cost FPGA is presented proving the feasibility of this approach.

AB - Feature extraction is an important stage in image processing for object classification, tracking or identification. Real time processing adds stringent constraints on the efficiency of this task. The paper presents a discussion of a reconfigurable hardware processing architecture, based on components, for performing feature calculations using convolutions, morphology operators and local statistics. Special attention is directed to pipelining calculations, fast determination of minimum, median and maximum of values. The architecture is optimised for video streams, which provide the image contents using horizontal scanning. An implementation using a low cost FPGA is presented proving the feasibility of this approach.

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DO - 10.1007/978-3-642-15907-7_20

M3 - Conference contribution

AN - SCOPUS:78049279821

SN - 3642159060

SN - 9783642159060

T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

SP - 158

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BT - Computer Vision and Graphics - International Conference, ICCVG 2010, Proceedings

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Y2 - 20 September 2010 through 22 September 2010

ER -

Feature extraction using reconfigurable hardware

Abstract

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ASJC Scopus subject areas

Access to Document

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