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Extension of the boundary-scan architecture and new idea of bist for more effective testing and self-testing of interconnections

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

The approach presented in this paper enables more effective testing of on-board and board-to-board interconnections and significantly simplifies the interconnection self-testing. Some extensions must be added to the Boundary Scan Architecture which however do not violate the JTAG/IEEE 1149.1 standard requirements. Benefits are the reduced complexity and cost of an on-board testing unit as well as better test performance.

Original languageEnglish
Title of host publicationProceedings - European Conference on Design and Test, ED and TC 1997
PublisherAssociation for Computing Machinery
Pages630
Number of pages1
ISBN (Electronic)0818677864, 9780818677861
DOIs
Publication statusPublished - 17 Mar 1997
Event1997 European Conference on Design and Test, ED and TC 1997 - Paris, France
Duration: 17 Mar 1997 → 20 Mar 1997

Publication series

NameProceedings of the 1997 European Conference on Design and Test, EDTC 1997

Conference

Conference1997 European Conference on Design and Test, ED and TC 1997
Country/TerritoryFrance
CityParis
Period17/03/97 → 20/03/97

ASJC Scopus subject areas

  • Control and Systems Engineering
  • General Computer Science

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