TY - GEN
T1 - Extension of the boundary-scan architecture and new idea of bist for more effective testing and self-testing of interconnections
AU - Kristof, Adam
N1 - Publisher Copyright:
© 1997 IEEE.
PY - 1997/3/17
Y1 - 1997/3/17
N2 - The approach presented in this paper enables more effective testing of on-board and board-to-board interconnections and significantly simplifies the interconnection self-testing. Some extensions must be added to the Boundary Scan Architecture which however do not violate the JTAG/IEEE 1149.1 standard requirements. Benefits are the reduced complexity and cost of an on-board testing unit as well as better test performance.
AB - The approach presented in this paper enables more effective testing of on-board and board-to-board interconnections and significantly simplifies the interconnection self-testing. Some extensions must be added to the Boundary Scan Architecture which however do not violate the JTAG/IEEE 1149.1 standard requirements. Benefits are the reduced complexity and cost of an on-board testing unit as well as better test performance.
UR - https://www.scopus.com/pages/publications/85029617221
U2 - 10.1109/edtc.1997.582443
DO - 10.1109/edtc.1997.582443
M3 - Conference contribution
AN - SCOPUS:85029617221
T3 - Proceedings of the 1997 European Conference on Design and Test, EDTC 1997
SP - 630
BT - Proceedings - European Conference on Design and Test, ED and TC 1997
PB - Association for Computing Machinery
T2 - 1997 European Conference on Design and Test, ED and TC 1997
Y2 - 17 March 1997 through 20 March 1997
ER -