Abstract
A new method of designing built-in test pattern generator (TPG) for digital circuits is presented in the paper. The specific cellular automata register structure (henceforth denoted as DTI-LFSR) composed of D and T flip-flops with either active-high or active-low inputs is used as an effective TPG. It is shown in the paper how to find DTI-LFSR structure that generates vector sequence that contains at least some of deterministic test patterns detecting hard faults in the given circuit under test. The remaining faults, if any, are covered by the sequence of pseudo-random patterns produced either by the same DTI-LFSR structure or by its modified version supplemented with a linear feedback path, which is henceforth called IEDTI-LFSR. The main advantage of a TPG designed according to the proposed method is short testing time. This feature is supported by experimental results. Another good point of the DTI-LFSR is its low area overhead and high operational frequency.
| Original language | English |
|---|---|
| Pages (from-to) | 975-983 |
| Number of pages | 9 |
| Journal | Microelectronics Reliability |
| Volume | 42 |
| Issue number | 6 |
| DOIs | |
| Publication status | Published - Jun 2002 |
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Atomic and Molecular Physics, and Optics
- Safety, Risk, Reliability and Quality
- Condensed Matter Physics
- Surfaces, Coatings and Films
- Electrical and Electronic Engineering
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