Abstract
The article discusses the design process of the central processing unit (CPU) for programmable logic controllers. On the one hand the designed CPU is compatible with IEC 61131-3 standard. On the other hand, the authors attempt to reflect on the possible implementations of the unit by means of FPGA. The machine instructions of the unit are tailored to be similar to instruction list (IL) introduced in the IEC 61131-3 standard. However, the unit is programmed by means of the standard IL. Remarks about the IEC standard and the specific features of the FPGA technology are presented.
| Original language | English |
|---|---|
| Pages (from-to) | 454-459 |
| Number of pages | 6 |
| Journal | IFAC-PapersOnLine |
| Volume | 49 |
| Issue number | 25 |
| DOIs | |
| Publication status | Published - 2016 |
Keywords
- CPU
- IEC 61131-3
- PLC
- central processing unit
ASJC Scopus subject areas
- Control and Systems Engineering
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