An utilisation of boolean differential calculus in variables partition calculation for decomposition of logic functions

Stefan Kolłodziński; Edward Hrynkiewicz

doi:10.1109/DDECS.2009.5012095

An utilisation of boolean differential calculus in variables partition calculation for decomposition of logic functions

Stefan Kolłodziński
, Edward Hrynkiewicz

Department of Digital Systems (RAU/RAU12)

United Technologies Corporation

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

7 Citations (Scopus)

Abstract

The paper deals with the problems of input variables assigning to the free and bounded sets during logic function decomposition. The Ashenhurst decomposition is considered with respect to implementation of logic functions in LUT based FPGA. The method of finding profitable input variables partitioning is based on utilisation of Logic Differential Calculus. The elaborated method is very convenient especially if decomposition is carried out in Reed- Muller spectral domain because the Boolean differentials are easy calculated from Reed-Muller form of logic function which is simply calculated as reverse Reed-Muller transform. The obtained results are very promising.

Original language	English
Title of host publication	Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009
Pages	34-37
Number of pages	4
DOIs	https://doi.org/10.1109/DDECS.2009.5012095
Publication status	Published - 2009
Event	2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009 - Liberec, Czech Republic Duration: 15 Apr 2009 → 17 Apr 2009

Publication series

Name	Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009

Conference

Conference	2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009
Country/Territory	Czech Republic
City	Liberec
Period	15/04/09 → 17/04/09

ASJC Scopus subject areas

Hardware and Architecture
Control and Systems Engineering
Electrical and Electronic Engineering

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10.1109/DDECS.2009.5012095

Cite this

Kolłodziński, S., & Hrynkiewicz, E. (2009). An utilisation of boolean differential calculus in variables partition calculation for decomposition of logic functions. In Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009 (pp. 34-37). Article 5012095 (Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009). https://doi.org/10.1109/DDECS.2009.5012095

Kolłodziński, Stefan ; Hrynkiewicz, Edward. / An utilisation of boolean differential calculus in variables partition calculation for decomposition of logic functions. Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009. 2009. pp. 34-37 (Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009).

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title = "An utilisation of boolean differential calculus in variables partition calculation for decomposition of logic functions",

abstract = "The paper deals with the problems of input variables assigning to the free and bounded sets during logic function decomposition. The Ashenhurst decomposition is considered with respect to implementation of logic functions in LUT based FPGA. The method of finding profitable input variables partitioning is based on utilisation of Logic Differential Calculus. The elaborated method is very convenient especially if decomposition is carried out in Reed- Muller spectral domain because the Boolean differentials are easy calculated from Reed-Muller form of logic function which is simply calculated as reverse Reed-Muller transform. The obtained results are very promising.",

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doi = "10.1109/DDECS.2009.5012095",

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isbn = "9781424433391",

series = "Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009",

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booktitle = "Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009",

note = "2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009 ; Conference date: 15-04-2009 Through 17-04-2009",

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Kolłodziński, S & Hrynkiewicz, E 2009, An utilisation of boolean differential calculus in variables partition calculation for decomposition of logic functions. in Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009., 5012095, Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009, pp. 34-37, 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009, Liberec, Czech Republic, 15/04/09. https://doi.org/10.1109/DDECS.2009.5012095

An utilisation of boolean differential calculus in variables partition calculation for decomposition of logic functions. / Kolłodziński, Stefan; Hrynkiewicz, Edward.
Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009. 2009. p. 34-37 5012095 (Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AB - The paper deals with the problems of input variables assigning to the free and bounded sets during logic function decomposition. The Ashenhurst decomposition is considered with respect to implementation of logic functions in LUT based FPGA. The method of finding profitable input variables partitioning is based on utilisation of Logic Differential Calculus. The elaborated method is very convenient especially if decomposition is carried out in Reed- Muller spectral domain because the Boolean differentials are easy calculated from Reed-Muller form of logic function which is simply calculated as reverse Reed-Muller transform. The obtained results are very promising.

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Kolłodziński S, Hrynkiewicz E. An utilisation of boolean differential calculus in variables partition calculation for decomposition of logic functions. In Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009. 2009. p. 34-37. 5012095. (Proceedings of the 2009 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2009). doi: 10.1109/DDECS.2009.5012095

An utilisation of boolean differential calculus in variables partition calculation for decomposition of logic functions

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