A heuristic fault dictionary reduction methodology

Andrzej Pułka

doi:10.1109/ICECS.2007.4511190

A heuristic fault dictionary reduction methodology

Andrzej Pułka

Department of Electronics; Electrical Engineering and Microelectronics (RAU/RAU11)

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

2 Citations (Scopus)

Abstract

The paper concerns problems of electronic analog devices diagnoses. Various optimization techniques in the field of test point selection are discussed. New proposed modifications and improvements have form of algorithms implemented as an expert system in PROLOG language. The searching procedures are exemplified on benchmark circuits. The problem of extension of the methodology to complex fault dictionaries is considered.

Original language	English
Title of host publication	ICECS 2007 - 14th IEEE International Conference on Electronics, Circuits and Systems
Pages	1115-1118
Number of pages	4
DOIs	https://doi.org/10.1109/ICECS.2007.4511190
Publication status	Published - 2007
Event	14th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2007 - Marrakech, Morocco Duration: 11 Dec 2007 → 14 Dec 2007

Publication series

Name	Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Conference

Conference	14th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2007
Country/Territory	Morocco
City	Marrakech
Period	11/12/07 → 14/12/07

ASJC Scopus subject areas

General Engineering

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10.1109/ICECS.2007.4511190

Cite this

@inproceedings{1165f20d44c846aba643f67f70c675dd,

title = "A heuristic fault dictionary reduction methodology",

abstract = "The paper concerns problems of electronic analog devices diagnoses. Various optimization techniques in the field of test point selection are discussed. New proposed modifications and improvements have form of algorithms implemented as an expert system in PROLOG language. The searching procedures are exemplified on benchmark circuits. The problem of extension of the methodology to complex fault dictionaries is considered.",

author = "Andrzej Pu{\l}ka",

year = "2007",

doi = "10.1109/ICECS.2007.4511190",

language = "English",

isbn = "1424413788",

series = "Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems",

pages = "1115--1118",

booktitle = "ICECS 2007 - 14th IEEE International Conference on Electronics, Circuits and Systems",

note = "14th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2007 ; Conference date: 11-12-2007 Through 14-12-2007",

}

Pułka, A 2007, A heuristic fault dictionary reduction methodology. in ICECS 2007 - 14th IEEE International Conference on Electronics, Circuits and Systems., 4511190, Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems, pp. 1115-1118, 14th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2007, Marrakech, Morocco, 11/12/07. https://doi.org/10.1109/ICECS.2007.4511190

A heuristic fault dictionary reduction methodology. / Pułka, Andrzej.
ICECS 2007 - 14th IEEE International Conference on Electronics, Circuits and Systems. 2007. p. 1115-1118 4511190 (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Pułka, Andrzej

PY - 2007

Y1 - 2007

N2 - The paper concerns problems of electronic analog devices diagnoses. Various optimization techniques in the field of test point selection are discussed. New proposed modifications and improvements have form of algorithms implemented as an expert system in PROLOG language. The searching procedures are exemplified on benchmark circuits. The problem of extension of the methodology to complex fault dictionaries is considered.

AB - The paper concerns problems of electronic analog devices diagnoses. Various optimization techniques in the field of test point selection are discussed. New proposed modifications and improvements have form of algorithms implemented as an expert system in PROLOG language. The searching procedures are exemplified on benchmark circuits. The problem of extension of the methodology to complex fault dictionaries is considered.

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DO - 10.1109/ICECS.2007.4511190

M3 - Conference contribution

AN - SCOPUS:50649106637

SN - 1424413788

SN - 9781424413782

T3 - Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

SP - 1115

EP - 1118

BT - ICECS 2007 - 14th IEEE International Conference on Electronics, Circuits and Systems

T2 - 14th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2007

Y2 - 11 December 2007 through 14 December 2007

ER -

A heuristic fault dictionary reduction methodology

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ASJC Scopus subject areas

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